| dc.identifier.uri | http://hdl.handle.net/11401/77446 | |
| dc.description.sponsorship | This work is sponsored by the Stony Brook University Graduate School in compliance with the requirements for completion of degree. | en_US |
| dc.format | Monograph | |
| dc.format.medium | Electronic Resource | en_US |
| dc.language.iso | en_US | |
| dc.publisher | The Graduate School, Stony Brook University: Stony Brook, NY. | |
| dc.type | Thesis | |
| dcterms.abstract | A novel hybrid regulator topology is proposed to alleviate the weaknesses of existing hybrid topologies. Contrary to the dominant existing practice, a switched-capacitor converter and a resistorless LDO operate in a parallel fashion to supply current and regulate the output voltage. The proposed topology targets a fully integrated regulator without using any inductors and resistors. The primary emphasis is on maximizing power efficiency while maintaining sufficient regulation capability (with ripple voltage less than 10% of the output voltage) and power density. The first implementation of the proposed topology operates in a single frequency mode. Simulation results in 45 nm technology demonstrate a power efficiency of approximately 85% at 100 mA load current with an input and output voltage of, respectively, 1.15 V and 0.5 V. The worst case transient response time is under 20 ns when the load current varies from 65 mA to 130 mA. The worst case ripple is 22 mV while achieving a power density of 0.5 W/mm^2. This single-frequency hybrid voltage regulator is useful (due to its fast and continuous response and high power efficiency) when the output load current is relatively constant at a certain nominal value. However, the performance is degraded when the load current varies significantly beyond the nominal current since the current provided by switched-capacitor converter is constant. The second implementation of the proposed hybrid regulator topology partially alleviates this issue by employing two different frequencies de- pending on the load current. This design is also implemented in 45 nm technology. It is demonstrated that the power efficiency is maintained within 60% to 80% even though the load current varies by more than 100 mA. The power density remains the same (0.5 W/mm^2). The simulation results of the proposed topology are highly competitive with recent work on integrated voltage regulators. | |
| dcterms.available | 2017-09-20T16:52:42Z | |
| dcterms.contributor | Salman, Emre | en_US |
| dcterms.contributor | Stanacevic, Milutin. | en_US |
| dcterms.creator | Park, Yongwan | |
| dcterms.dateAccepted | 2017-09-20T16:52:42Z | |
| dcterms.dateSubmitted | 2017-09-20T16:52:42Z | |
| dcterms.description | Department of Electrical Engineering | en_US |
| dcterms.extent | 40 pg. | en_US |
| dcterms.format | Monograph | |
| dcterms.format | Application/PDF | en_US |
| dcterms.identifier | http://hdl.handle.net/11401/77446 | |
| dcterms.issued | 2016-12-01 | |
| dcterms.language | en_US | |
| dcterms.provenance | Made available in DSpace on 2017-09-20T16:52:42Z (GMT). No. of bitstreams: 1
Park_grad.sunysb_0771M_12885.pdf: 1441679 bytes, checksum: 7c71806f084961d7a5f532c38dd7c30d (MD5)
Previous issue date: 1 | en |
| dcterms.publisher | The Graduate School, Stony Brook University: Stony Brook, NY. | |
| dcterms.subject | Electrical engineering | |
| dcterms.subject | converter, DVFS, hybrid voltage regulator, low drop-out (LDO) regulator, regulator, switched capacitor converter | |
| dcterms.title | Fully Integrated Hybrid Voltage Regulator for Low Voltage Applications | |
| dcterms.type | Thesis | |
