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Title: A VM-HDL Co-Simulation Framework for Systems with PCIe-Connected FPGAs
Authors: Cho, Shenghsun
Patel, Mrunal
Kaladagi, Basavaraj
Chen, Han
Palit, Tapti
Ferdman, Michael
Milder, Peter
Issue Date: 2017
Publisher: Department of Computer Science
Series/Report no.: ;CEAS Technical Report; 839
Appears in Collections:Technical Reports

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